1. Field of the Invention
The present invention relates to high density memory devices based on programmable resistance memory materials, including metal-oxide based materials and other materials, and to methods for manufacturing such devices.
2. Description of Related Art
In the manufacturing of high density memory, the amount of data per unit area on an integrated circuit can be a critical factor. Thus, technologies for stacking multiple planar arrays of memory devices have been proposed. See for example, Johnson et al., “512-Mb PROM With a Three-Dimensional Array of Diode/Anti-fuse Memory Cells” IEEE J. of Solid-State Circuits, vol. 38, no. 11, November 2003. In the design described in Johnson et al., multiple layers of word lines and bit lines are provided, with memory elements at the cross-points. The memory elements comprise a p+ polysilicon anode connected to a word line, and an n− polysilicon cathode connected to a bit line, with the anode and cathode separated by anti-fuse material. Issues that stacked planar arrays need to address include cost and simplicity of manufacturing.
It is desirable to provide high density stacked memory technologies that are readily manufactured and reliable.